VCSEL Chips

Raysees 2D Addressable VCSEL enables pixel-level electrical addressing at the chip level. Built on a highly uniform vertical-cavity resonant architecture, it supports selective pixel activation, dynamic pattern projection, and programmable timing control — delivering higher optical power density and greater system flexibility for intelligent LiDAR sensing.

Raysees Ultra-Low-Divergence VCSEL technology uses advanced chip architecture and process optimization to achieve <15° beam divergence while maintaining high optical output power. It reduces optical crosstalk between the transmit and return paths, enabling more compact proximity sensing modules, simplified optical design, and higher-precision distance measurement.

Raysees backside-emitting microlens-integrated VCSEL uses a flip-chip architecture for faster pulse rise/fall times and higher peak optical power. By integrating microlenses on the backside-emitting VCSEL, it improves beam control while reducing optical stack height — enabling compact sensing modules for space-constrained smartphones, VR, and AR systems.

Raysees high-power-density, high-peak-power VCSEL technology delivers several times higher optical output power without increasing chip size, while improving power conversion efficiency. It enables compact, long-range optical sensing systems for applications such as 3D dToF and LiDAR.

High-speed VCSELs serve as core light sources for short-reach interconnects in data centers and AI clusters, primarily in parallel optical links. Optimized for array uniformity, modulation performance, and long-term reliability, they enable scalable bandwidth, controlled power consumption, and stable operation for next-generation optical modules.